Minggu, 14 Januari 2018

PABX technology relationships can be heard security and electronic circuit of desktop charger AMNIMARJESLOW GOVERNMENT 9_1 FOR PABX line number and relax it with a desktop charger XAM


              PABX line number and relax it with a desktop charger

         
                                   Hasil gambar untuk Desktop charger 
 
 

Is Your IP PBX Secure?


VoIP faces net threats and internal malfeasance, but there steps you can take to lock things down.
The current crop of VoIP PBX systems provides an IP-based alternative to traditional circuit-switched phone systems, delivering savings and flexibility for enterprises of all sizes. Like any IP-based system, however, a VoIP PBX brings with it risks that can't be ignored--among them, denial-of-service attacks, privacy breaches, and theft of services. Securing a VoIP PBX presents some unique challenges, but the alternative--loss of service and, possibly, loss of customers--may be more costly in the long run.
Fortunately, safeguarding an IP PBX doesn't require an army of experts or Big Brother-style intrusions. You can get off to a good start by applying the same basic principles you'd use with any IP-based system: Adopt a defense-in-depth strategy to protect components of your PBX from as many threats as possible. Consider your network infrastructure as well as your phones. How many VoIP phones have you deployed? How big is your network? These calculations will help determine what steps to take next.

Isolating components on virtual LANs is a popular approach for securing the corporate network. Many VoIP phones, including those from Polycom and Grandstream Networks, have built-in switches that set up an 802.1p/Q trunk over the link to the local switch in the wiring closet. 802.1p/Q allows VLANs to share a physical network without leaking information. The trunk separates voice traffic from data traffic, from the phone all the way to the IP PBX.
Isolating VoIP traffic will boost security, but it won't stop all intruders. Software that mimics the VoIP VLAN could let an attacker tap in from a data jack. You can limit the UDP and TCP ports that can access the IP PBX from the VLAN by using the access control lists on switches or routers, or by installing a firewall to limit the TCP and UDP ports that are vulnerable. You can also lock down the Ethernet addresses that access the network.
Defining separate VLANs for phones also makes it possible to better control bandwidth allocation--in other words, raise quality of service--to protect the IP PBX from denial-of-service worms that originate on the network. VoIP doesn't require much bandwidth, but it's sensitive to packet loss and delays, so boosting quality of service can be very effective in keeping conversations going during such an attack.
You also need to be careful with auto configuration protocols, such as the LLDP-MED standard or Cisco's proprietary CDP. These protocols ease the administrative burden of VoIP phones and VLAN configuration, but they aren't hard to spoof. 

VoIP phones' use of encryption today provides better privacy protection than most legacy phones. However, protection only lasts until a call leaves your network. The public switched telephone network doesn't provide encryption.
The signaling protocol for outgoing calls can be encrypted, as can the Real-Time Transport protocol that transports the actual conversation. Encrypting the signaling protocol will prevent eavesdroppers from gleaning phone numbers within your organization.
Diagram: Switch On Data Security
VoIP phones have a built-in switch that creates an 802.1p/Q trunk over the link to the local switch in the wiring closet. The 802.1p/Q-enabled link separates voice and PC data onto distinct VLANs, so one cable can carry both types through the company network. The VLANs carry traffic to the data center switch, which sends voice data to the IP PBX and other data to its network destination.
FIREWALL OPTIONS
Firewall rules should deny all Internet access to your IP PBX servers, gateways, and phones, and should limit access between the phone VLAN and IP PBX. Vendors such as Check Point say they can do this via Session Initiation Protocol filtering, but there may be compatibility issues. Test this feature carefully with your equipment.



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PABX (VoIP)

 
PABX (VoIP)
 
Private Automated Branch Exchange (PABX) is a phone switching system that widely used in offices and plants, allowing a single access number to offer multiple lines to outside callers while providing a range of external lines to internal callers or staff.
Omega provides a full range of PABX systems including analog PABX, IP PABX and Hybrid PABX. The IP PABX uses “Voice over Internet Protocol” (VoIP) technology to transform high speed internet service into a phone line to convert voice into digitized packets and then put the digitized packets onto the data network. It can easily adapt to any business, helping clients increase employees’ productivity, improve customer service and reduce cost, bring long term benefits for scalability, manageability and enhanced features.
 
 
 
PABX VOIP DIAGRAM
 


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Build this portable USB charger circuit, and you’ll always have access to a charger.
Imagine a beautiful summer day. You’re on your way to meet friends for a picnic in the park. But, the park is huge and full of people. Since you don’t know where exactly your friends are, you pick up your phone to call them.
But as you dial the number, the battery on your phone dies…
Ahhh!
With this portable USB charger circuit, there’s no need to worry. Just drop by a supermarket nearby and pick up some standard batteries to recharge your phone on-the-go.

Portable USB Charger Circuit Diagram

Here’s the circuit diagram:
Portable USB charger circuit diagram

Parts List

PartValueDescription
U17805Voltage Regulator
LEDStandard OutputLight-Emitting Diode
R1330 ΩResistor
R275 kΩResistor
R375 kΩResistor
R451 kΩResistor
R551 kΩResistor
D11N4001-4007Rectifier Diode
USBType A SocketSolderable
6xAA, 6xAAA or 9VBattery Connector
I’ve created a resource page to make it easy for you to find components. Click here to see where you can get everything you need to build this circuit.

How The Circuit Works

The circuit is based around the LM7805 chip. It’s a voltage regulator that takes an input of between 7V to around 30V and gives out 5V with up to 1A of current.

To see if the charger is working or not, I’ve included an LED and a 330 Ω resistor between 5V and the minus of the battery. The circuit will work perfectly fine without these also.
Led and a resistor
The resistors R2 to R5 set the voltage levels on the data lines to specific voltages. These voltages ensure that the device knows what current to use for charging. I got the values for these resistors from an Adafruit article where they opened an iPhone charger to see how it worked. These values will make an iPhone and many other devices charge with 500 mA.
Four resistors for setting USB data lines
The rectifier diode D1 makes sure you don’t damage the circuit if you connect plus and minus the wrong way. It also reduces the voltage by 1V, which means you need at least 8V in for the charger to work.
It’s not really necessary to have this diode. If you’re going to solder the plus and minus leads to the board, I’m sure you’ll double-check the connection before testing. But, with 9V input it’s a good thing to reduce the voltage to the voltage regulator anyway to reduce the heat.
Also, it makes it possible to use a DC socket for connecting a range of different inputs without worrying about plus and minus being correct.

The voltage regulator can still get too hot and shut down, even with this diode. If you find that this happens a lot, you can solve it by adding a clip-on heatsink for TO-220.
The USB charger circuit works from 6 AA batteries, 6 AAA batteries, or a 9V battery. All these batteries are fairly simple to find in most supermarkets.

How To Build The Charger Circuit

This circuit is fairly easy to build. You only need 7 components. It’s perfect for soldering onto a stripboard.

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How to Design Battery Charger Applications that Require External Microcontrollers and Related System-Level Issues


Abstract: Notebook computers increasingly require complex battery charging algorithms and systems. This article provides information and background on lithium-ion (Li+), nickel-cadmium (NiCd), and nickel-metal-hydride (NiMH) batteries and related system-level switch-mode and linear battery chargers. These voltage regulators and current regulators are controlled by external microprocessors like the 8051 or Microchip PIC, and examples are provided with these controllers. An overview of requirements for charging common battery chemistries with Maxim battery charger ICs is provided, along with a discussion of system-level trade-offs and firmware design tips, and a list of World Wide Web engineering resources.

The previous issue of Maxim's Engineering Journal (Vol. 27) discussed new developments in stand-alone battery chargers. This second article of a two-part series explores the system-level issues in applying battery-charger ICs.

Over the past five years, market pressures on portable equipment have transformed the simple battery charger into a sophisticated switch-mode device capable of charging an advanced battery in 30 minutes. This development also marks a departure from the self-contained, stand-alone charger ICs of only a few years ago. Some of those ICs included considerable intelligence: enough to handle the complex task of fast charging advanced batteries.

Maxim still manufactures stand-alone charger ICs, but market demand has changed recently. Today's battery-charger subsystems regulate charging voltage and current using the intelligence of an external microcontroller (µC), usually available elsewhere in the system. This approach achieves low cost in high-volume applications and allows the greatest flexibility in tailoring the charger to a specific application.

All necessary intelligence once resided in the battery-charger controller IC itself, but now the system designer must implement a charging algorithm and write the associated firmware. This article provides the information and background necessary to implement charger systems based on Maxim's wide range of battery-charger ICs for all popular chemistries.

The following discussion presents an overview of the requirements for charging common battery chemistries with Maxim battery-charger ICs. It addresses system-level trade-offs and firmware design tips, and lists World Wide Web resources available to designers. The discussion closes with design examples based on two common µCs: the 8051 and the Microchip PIC. Either example can serve as a base for further development of custom charger circuitry.

Overview of Battery-Charging Techniques

Four rechargeable battery chemistries are in practical use today: nickel cadmium (NiCd), nickel metal hydride (NiMH), gelled lead-acid (PbSO4), and lithium-ion (Li+). The trade-offs to be made among these chemistries are beyond the scope of this article, but the References section provides access to such information.

Caution: consult the battery manufacturer for specific recommendations. The information presented here is intended only as an overview of charging requirements for various cell chemistries.

This section describes general charging techniques and limitations for the four common chemistries. For additional details and background, see the Maxim data sheets and other reference material cited at the end of the article.

Fast battery charging has several phases, as explained in the text and by the state diagram for a generic charger (Figure 1).

Figure 1. Generic charger-state diagram.
Figure 1. Generic charger-state diagram.

Initialization

Though not a part of the actual charging procedure, initialization is an important stage in the process. The charger initializes itself and performs its own self-test. A charge can be interrupted by a power failure and consequent reinitialization. Without a smart battery or some type of time-stamped, nonvolatile storage, such events can occur unnoticed. Most chargers reinitialize themselves fully after a power failure. If overcharging is an issue, the charger can then execute a special self-test sequence to determine if the battery is already charged. A battery present on power-up, for example, should trigger such an action.

Several circumstances can allow this initialization to cause charging problems. A fixed-time charger, for example, applies charge to a battery for a fixed interval of four hours. If a power failure occurs three hours and 59 minutes into the charge, the charger starts another four-hour charge, giving the battery a four-hour overcharge. This treatment can damage the battery, and it is one reason fixed-time charging is seldom used. The example also shows why the charger should monitor battery temperature or use other termination methods as a backup measure.

Cell Qualification

This phase of the charging procedure detects when a battery is installed and whether it can be charged. Cell detection is usually accomplished by looking for voltage on the charger terminals while the charger source is off, but that method can pose a problem if the cells have been deeply cycled and are producing little voltage. As an alternative, the charger often looks for a thermistor or shorting jumper rather than the cell itself. The presence of this hardware can also serve to identify the battery pack. Smart batteries, on the other hand, conduct a rich exchange of serial data with the battery pack, usually providing all the necessary charging parameters over a specialized I²C-like protocol called the System Management Bus (SMBus™).

Once the charger determines that a cell is installed, it must determine if the cell is good. During this subphase (qualification), the cell is checked for basic functioning: open, shorted, hot, or cold. To test whether or not a cell is chargeable, some chargers-lead-acid types especially-apply a light charging current (about one-fifth of the fast rate) and allow the cell a fixed amount of time to reach a specified voltage. This technique avoids the problem of false rejects for deeply cycled PbSO4 batteries, and with the battery manufacturer's approval, it can be used for other chemistries as well.

A check of the ambient and cell temperatures is also a part of the qualification phase. When a charger detects high or low temperature, it usually waits a predetermined interval for the temperature to return to nominal. If this doesn't happen within the allotted time, the charger reduces the charging current. This action in turn reduces battery temperature, which increases efficiency. Finally, the cells are checked for opens and shorts. Open cells are easily detected, but a shorted-cell indication requires confirmation in order to avoid false failure indications. If all of these checks are satisfactory, the cell can be charged, and the state is advanced as shown in Figure 1.

Preconditioning Phase (Optional)

Some chargers (primarily those for NiCd batteries) include an optional preconditioning phase in which the battery is fully discharged before recharging. Full discharge reduces each battery's voltage level to 1V per cell and eliminates dendritic formations in the electrolyte, which cause what is often falsely labeled the memory effect. This so-called memory effect refers to the presence of dendritic formations that can reduce the run life of a cell, but a complete charge and discharge cycle sometimes eliminates the problem.

Preconditioning can be accomplished before each charge, or it can follow an indication (by load test or other operation) that more than half of the cell's charge remains. Preconditioning can last from one to ten hours. Discharging a battery in less than one hour is not generally recommended. Fast preconditioning raises the practical problem of what to do with heat dissipated by the load resistor. Nor is preconditioning for longer than ten hours usually recommended unless it can be initiated manually upon detection of reduced capacity. Confusion and misunderstanding surround the NiCd "memory effect," so the designer should avoid putting a button on the charger to counteract it.

Fast-Charge Phase and Termination

Fast-charge and termination methods used depend on cell chemistry and other design factors. The following discussion covers fast-charging techniques widely used for today's common battery chemistries. For specific guidelines and recommendations, consult the battery manufacturer's applications department.

NiCd and NiMH Cells

Fast-charging procedures for NiCd and NiMH batteries are very similar; they differ primarily in the termination method used. In each case, the charger applies a constant current while monitoring battery voltage and other variables to determine when to terminate the charge. Fast-charge rates in excess of 2C are possible, but the most common rate is about C/2. Because charging efficiency is somewhat less than 100%, a full charge at the C/2 rate requires slightly more than two hours.

While constant current is applied, the cell voltage rises slowly and eventually reaches a peak (a point of zero slope). NiMH charging should be terminated at this peak (the 0ΔV point). NiCd charging, on the other hand, should terminate at a point past the peak: when the battery voltage first shows a slight decline (-ΔV) (Figure 2). Cell damage can result if fast charge continues past either battery's termination point.

Figure 2. NiCd battery-charging characteristics at C/2 rate.
Figure 2. NiCd battery-charging characteristics at C/2 rate.

At rates exceeding C/2 (resulting in a charge time of no more than two hours), the charger also monitors the cell's temperature and voltage. Because cell temperature rises rapidly when a cell reaches full charge, the temperature monitor enables another termination technique. Termination on this positive temperature slope is called ΔT termination. Other factors that can trigger termination include charging time and maximum cell voltage. Well-designed chargers rely on a combination of these factors.

Note: Because certain effects that appear when a cell first begins charging can imitate termination conditions, chargers usually introduce a delay of one to five minutes before activating slope-detection termination modes. Also, charge-termination conditions are difficult to detect for rates below C/8, because the voltage and temperature slopes of interest (ΔV/Δt and ΔT/Δt) are small and comparable to other system effects. For safety during a fast charge, the hardware and software in these systems should always err on the side of earlytermination.

Lithium-Ion Cells

Li+ battery charging differs from the nickel-chemistry charging schemes. A top-off charge can follow to ensure maximum energy storage in a safe manner. Li+ chargers regulate their charging voltage to an accuracy better than 0.75%, and their maximum charging rate is set with a current limit, much like that of a bench power supply (Figure 3). When fast charging begins, the cell voltage is low, and charging current assumes the current-limit value.

Figure 3. Li+ battery voltage vs. charging current.
Figure 3. Li+ battery voltage vs. charging current.

Battery voltage rises slowly during the charge. Eventually, the current tapers down, and the voltage rises to a float-voltage level of 4.2V per cell (Figure 4).

Figure 4. Li+ battery-charging profile.
Figure 4. Li+ battery-charging profile.

The charger can terminate charging when the battery reaches its float voltage, but that approach neglects the topping-off operation. One variation is to start a timer when float voltage is reached, and then terminate charging after a fixed delay. Another method is to monitor the charging current, and terminate at a low level (typically 5% of the limit value; some manufacturers recommend a higher minimum of 100mA). A top-off cycle often follows this technique, as well.

The past few years have yielded improvements in Li+ batteries, the chargers, and our understanding of this battery chemistry. The earliest Li+ batteries for consumer applications had shortcomings that affected safety, but those problems cannot occur in today's well-designed systems. Manufacturers' recommendations are neither static nor totally consistent, and Li+ batteries continue to evolve.

Lead-Acid Cells

PbSO4 batteries are usually charged either by the current-limited method or by the more common and generally simpler voltage-limited method. The voltage-limited charging method is similar to that used for Li+ cells, but high precision isn't as critical. It requires a current-limited voltage source set at a level somewhat higher than the cell's float voltage (about 2.45V).

After a preconditioning operation that ensures that the battery will take a charge, the charger begins the fast charge and continues until it reaches a minimum charging current. (This procedure is similar to that of a Li+ charger). Fast charge is then terminated, and the charger applies a maintenance charge of VFLOAT (usually about 2.2V). PbSO4 cells allow this float-voltage maintenance for indefinite periods (Figure 5).

Figure 5. PbSO4 battery-charging profile.
Figure 5. PbSO4 battery-charging profile.

At higher temperatures, the fast-charge current for PbSO4 batteries should be reduced according to the typical temperature coefficient of 0.3% per degree centigrade. The maximum temperature recommended for fast charging is about 50°C, but maintenance charging can generally proceed above that temperature.

Optional Top-Off Charge (All Chemistries)

Chargers for all chemistries often include an optional top-off phase. This phase occurs after fast-charge termination and applies a moderate charging current that boosts the battery up to its full-charge level. (The operation is analogous to topping off a car's gas tank after the pump has stopped automatically.) The top-off charge is terminated on reaching a limit with respect to cell voltage, temperature, or time. In some cases, top-off charge can provide a run life of 5% or even 10% above that of a standard fast charge. Extra care is advisable here: the battery is at or near full charge and is therefore subject to damage from overcharging.

Optional Trickle Charge (All Chemistries Except Li+)

Chargers for all chemistries often include an optional trickle-charge phase. This phase compensates for self-discharge in a battery. PbSO4 batteries have the highest rate of self-discharge (a few percent per day), and Li+ cells have the lowest. The Li+ rate is so low that trickle charging is not required or recommended. NiCds, however, can usually accept a C/16 trickle charge indefinitely. For NiMH cells, a safe continuous current is usually around C/50, but trickle charging for NiMH cells is not universally recommended.

Pulsed trickle is a variation in which the charger provides brief pulses of approximately C/8 magnitude, with a low duty cycle that provides a typical average trickle current of C/512. Because pulsed-trickle charging applies to both nickel chemistries and lends itself well to the on/off type of microprocessor (µP) control, it is used almost universally.

Generic Charging System

Before looking at specific circuit implementations, designers should become familiar with generic blocks and features (Figure 6). All fast chargers should include these block functions in some form. The bulk power source provides raw dc power, usually from a wall cube or brick. The current and voltage controls regulate current and voltage applied to the battery. For less-expensive chargers, the regulator is usually a power transistor or other linear-pass element that dissipates power as heat. It can also be a buck switching supply that includes a standard freewheeling diode for average efficiency or a synchronous rectifier for highest efficiency.

Figure 6. Generic charging-system block diagram.
Figure 6. Generic charging-system block diagram.

The blocks on the right in Figure 6 represent various measurement and control functions. An analog current-control loop limits the maximum current delivered to the battery, and a voltage loop maintains a constant voltage on the cell. (Note that Li+ cells require a high level of precision in the applied charging voltage.)

A charger's current-voltage (I-V) characteristic can be fully programmable, or it can be programmable in current only, with a voltage limit (or vice versa). Cell temperature is always measured, and charge termination can be based either on the level or the slope of this measurement. Chargers also measure charging time, usually as a calculation in the intelligence block.

This block provides intelligence for the system and implements the state machine previously described. It knows how and when to terminate a fast charge. Intelligence is internal to the chip in stand-alone charger ICs. Otherwise, it resides in a host µC, and the other hardware blocks reside in the charger IC. As mentioned previously, this latter architecture is the one preferred today.

Overview of Maxim's Charger Offerings

Maxim manufactures a broad selection of stand-alone and controller-type battery-charger ICs. The variety enables a system designer to make tradeoffs in performance, features, and cost. Table 1 lists these ICs by the battery chemistry supported, in their order of introduction, with the most recent models at the top.

Table 1. Overview of Maxim's Battery-Charger ICs
PartControl MethodStandard Regulation Mode**FeaturesChemistryCharge RateCharge Termination Method
MAX1647µC control, SMBusSynchronous switchingSmart-battery system, level 2 compliant, smart-battery charger with SMBus, Li+, independent I-V controlAllProgrammedProgrammed
MAX1648UserSynchronous switchingAnalog-controlled version of MAX1647, high-accuracy switching, I/V source: Li+AllProgrammedProgrammed
MAX745DAC or stand-aloneSynchronous switchingAdvanced, low-cost, switch-mode Li+ charger, stand-alone, Li+ onlyLi+Constant voltage, Li+Li+ float
MAX846ADAC or stand-aloneLinearLow-cost, universal charger, accurate reference for Li+, external CPU support, reset and regulatorAllConstant voltage, Li+, programmedLi+ float or programmed
MAX1540DAC or stand-aloneSynchronous switchingAnalog-controlled, switch-mode current source, Li+ or universalLi+, NiCd, NiMHFast, trickle, pulse-trickle, top-offProgrammed or Li+ stand-alone
MAX712Stand-aloneLinearComplete, low-cost NiMH with termination modes, max times, LED outputs. No Li+.NiMHFast, trickle0ΔV, max voltage, max temperature, max time
MAX713Stand-aloneLinearComplete, low-cost NiCd with termination modes, max times, LED outputs. No Li+.NiCdFast, trickle0ΔV, max voltage, max temperature max time
*The use of a DAC and µC is also possible with the DAC-input types.
**All linear types can be used in a hysteretic switching mode for higher efficiency.

The choice between linear and switch-mode regulation constitutes a major design decision. Linear mode is less costly, but it dissipates power and gets hot. Heat may not be a problem in large desktop chargers, but it can be unacceptable in smaller systems such as a notebook PC. Synchronous switching regulators offer the highest efficiency (in the mid-90% range), which makes them suitable for the smallest systems, including cell phones. Some of the nonsynchronous switch-mode circuits listed also offer reasonable efficiency. In addition, most of the linear parts can be used in a moderately efficient hysteretic switching mode. (For details, consult the appropriate data sheet.)

The charger's level of autonomy poses another design decision. Stand-alone chargers, for example, are completely self-contained. The MAX712/MAX713 have LED-control outputs for the user's end equipment as well.

Other devices can stand alone or can operate with a digital-to-analog converter (DAC) and µP. They include the MAX1640/MAX1641, MAX846A, and MAX745. The MAX1640, a voltage-limited current source intended primarily for charging nickel-chemistry batteries, includes a charge timer and pulse-trickle circuitry. It has stand-alone features and operates with a high-efficiency synchronous switching regulator or (for lower cost applications) a standard switcher.

The MAX846A and MAX745 are both capable of stand-alone operation in charging Li+ batteries, and they include the high-accuracy reference and independent voltage and current control necessary for universal controllers. The MAX846A is a linear type, and the MAX745 is a synchronous-switching type. Though either can stand alone, they usually operate with a µC that provides limited control of the charging process. LED illumination and fast-charge termination are usually initiated by the software. The MAX846A includes a linear regulator and a CPU-reset output for the µC.

The least autonomous and most flexible devices are the MAX1647 and MAX1648. They are similar, except the MAX1647 has built-in DACs and an SMBus serial port, and the MAX1648 has analog inputs for voltage and current control. The MAX1647 is a complete, serially controlled dc power supply with independent voltage and current registers. Capable of SMBus communications with a smart battery, it provides Level 2 compliance with the Intel/Duracell smart-battery specification.

µC Design Tips

These charger ICs typically operate with a low-cost 8-bit controller such as the 8051, PIC, 68HC11, or 68HC05. The firmware can be written in assembly language or in C, either of which feature ready availability, low cost, and free tools. Third parties and manufacturers of these devices have assembled an impressive array of compilers, assemblers, emulators, and code libraries. Much of this source code is available on the World Wide Web, especially the toolbox routines for assembly language. The Tips for charger program structure section provides further information on these resources.

All common 8-bit µCs are suitable, but the selection of a specific µC is beyond the scope of this article. Peripherals such as analog-to-digital converters (ADCs), DACs, and the SMBus serial interface are available in these µCs, and simpler µC versions that require external ADCs or DACs are also useful. Often, simpler µC versions that require external ADCs or DACs are more flexible and ultimately more useful.

The ROM and RAM requirements for charger applications are modest. In general, you can implement a single-chemistry charger in less than 0.5kbytes of code and 32 bytes of RAM (simple requirements for even a low-end PIC). With some ingenuity, you can implement a multi-chemistry charger with about 50% more code.

The simplest way to develop µC code is to start with a skeleton or a piece of similar code, and modify it to suit your needs. This approach gets a prototype working quickly by overcoming a lot of the blank-page, compiler/assembler- syntax problems. Unfortunately, only a limited amount of battery-charger firmware exists on the Web and in standard application notes. However, two design examples in the Hardware and Software Examples section provide a starting point. See the Resources and references section for more information on some of the more difficult toolbox routines, such as SMBus communications and math routines, and for examples of program designs that illustrate approaches to these designs.

Tips for Charger-Program Structure

Writing battery-charger software is straightforward and best implemented with a state machine. Define a state variable or series of flags that represents the current state. The code then tends to be a large case statement that acts according to this state variable. The code modules modify the state variable according to the current conditions. Disallowed and undecodable states pose the only potential problems. All case statements must have a default case that picks up these disallowed or "impossible" states and corrects them. Always include a mechanism that detects these conditions and then takes intelligent action, such as stopping the charger.

Keep the code simple: avoid multiple interrupts and complex multitasking or queuing structures where possible. Using a single timer-tick interrupt is a very effective way to keep time. If the CPU has a timer with an interrupt, use it to maintain system-timer flags. This powerful technique is an exception to the no-interrupts rule. If no timer interrupt is available (as in the PIC16C5x), use the system timer (RTC) and poll it. Design the code so the timer cannot overflow between polls.

Avoid hardware interrupts. Instead, poll the hardware inputs at regular intervals set by the timer tick. Code execution takes place in real time, but it doesn't have to react immediately to stimuli. The 100ms required to determine whether the battery is installed is acceptable, considering that battery charging takes an hour. Typical performance for stand-alone chargers is usually one calculation per minute for termination.

A simple and workable structure for these programs is a paced loop. The main program is a loop that looks at timer flags set by a timer interrupt-service routine or the loop itself, and calls subroutines that perform the multiple tasks required. Some routines run on each pass, and others run on every "nth" loop or tick. The basic tick time might be 100ms, for example. A blinking-light subroutine with a half-second period would be called to complement the LED every five ticks, and the temperature-limit detector would be checked on each pass through the loop. The result is a very robust structure.

For controllers that lack a timer interrupt, the paced loop can be implemented by the routines themselves, using their own execution times to maintain system timing. This technique is implemented in the next section by the code example for an 8-pin PIC controller. A simple flow chart of this structure (Figure 7) is described in greater detail in Reference 7.

Figure 7. Main paced-loop flow chart.
Figure 7. Main paced-loop flow chart.

Hardware Fail-Safe Reminder

Before exploring some examples, one final recommendation is to consider the use of a µP supervisor with a watchdog timer and a hardware fail-safe system. The supervisor's reset function provides a clean system reset when the power comes up, and the watchdog timer can catch a stalled CPU or errant firmware stuck in a loop. Maxim also makes some simple temperature-measurement/control products. The MAX6501 temperature switches make an especially good backup system. They are SOT23 devices that change their output level when a fixed temperature threshold is crossed.

Supervisors are especially important in charger applications, because the constant application and removal of power to the charger can confuse the CPU. If, for example, the processor stalls and fails to terminate a fast charge, the results can be catastrophic. The system should also include a temperature sensor or other hardware override that can end the fast charge without software intervention. Some of Maxim's SOT23-reset supervisors include a watchdog (see the MAX823).

Hardware and software examples
  1. MAX846A Li+ charger with charge timer and LED-status outputs, controlled by an 8-pin PIC

    In this example, a small external µP enhances the MAX846A, forming a complete desktop-charger system that includes user-interface functions such as the LEDs in Figure 8 (to indicate the charge process and status). The MAX846A is designed for this type of operation. Its auxiliary linear regulator and µP-reset circuit (to support the external µC) reduces the cost of a typical desktop-charger application.

    Figure 8. Li+ desk charger with LED status indicator.
    Figure 8. Li+ desk charger with LED status indicator.

  2. MAX1647-based, 2A Li+ charger with 8051 µC

    The full-featured MAX1647 charger and 8051 µC form a full-featured Li+ charger (Figure 9). The Atmel 80C2051 controller shown (a nonexpandable 8051 in a small package) is typical of the controllers usually available in systems requiring a high-end charger. Source code for the application includes SMBus communications, a general state-machine structure, and other useful routines. Look for LI1647.doc and PIC846.doc under "Other Software." The charger status can be read out from the UART or by additional software residing in the µP.

    Figure 9. Full-featured Li+ charger.
    Figure 9. Full-featured Li+ charger.

  3. Software examples for the MAX1647 and MAX846A chargers

    Software for the MAX1647 and MAX846A examples (Figure 9) is available at Maxim's web site. MAX846A software for the 8-pin PIC12C508 controller is written in Microchip PIC assembly language. It implements an LED user interface and a timer that terminates the fast charge five minutes after reaching the Li+ voltage limit. This simple example does not include the state machine or the complexities of a full charger, because much of that capability is available in the nearly stand-alone MAX846A.
The example does rely on the paced-loop structure without interrupts, as described earlier.

The MAX1647 example is written in 8051 assembly code for Atmel's ATM80C2051, a 20-pin version of the 8051. This code includes a general state-machine structure and SMBus-driver routines for communicating with the MAX1647 internal registers. It also incorporates a paced-loop structure, but employs the 80C2051's timer interrupt to create a timer-tick basis for all timing.






        

Rabu, 10 Januari 2018

the fineness of the product product work is placed on the round of effective investment capital investment so that the round is stable planned out / eff electronics format AMNIMARJESLOW GOVERNMENT 91 22 00 17 ROUND 1000 + 1000 02 09 60 01 00 14 GO WINGS LJBUSAF XAM 20 ELECTRON



                   Raw Materials Used in the Manufacture of Electronic Components


                              
                                The stability of the round determines the tooth

 
Electronic components are made from several types of raw material.The electronic devices used by millions of people daily are made of many tiny electronic components and those components are made from a variety of raw materials. These raw materials have special characteristics, ranging from superior conductivity to unmatched insulating properties, that make them perfect for use in electronic components.
Metals
Copper is often used for its excellent conductivity and malleability (the ability to be shaped and mashed). Nckel, chromium, aluminum, lead, silver and tin are also used. These metals go into components such as resistors, capacitors and transducers.

Plastics and Other Petroleum-Based Materials

Plastics and other petroleum-based materials are used in electronic components mostly for their insulating and heat-resistant properties. Polystyrene, polyethylene terephthalate (PET) and polyvinylchlorate (PVC) are widely used in components such as capacitors and thermistors.

Minerals and Non-Metallic Materials

Silicon — considered a metalloid, or semimetal — is used in microchips and semiconductors. Other nonmetal or semimetal materials are antimony, bismuth, cobalt, fluorite, garnet, magnesium and talc.

Other Raw Materials

Ceramics are used as insulators in a variety of electronic components. Certain clays, glasses, calcium (in various forms), gold and carbon (in various forms are also often used.
 
     Electronics

                            XXX  .  I  various kinds of weapons in technology

 

military inventions included:
  • Mobile bridges including drawbridges and a swing bridge for crossing moats, ditches and rivers. His swing bridge was a cantilever design with a pivot on the river bank a counterweight to facilitate manoeuvring the span over the river. It also had wheels and a rope-and-pulley system which enabled easy transport and quick deployment.
  • Siege machines for storming walls.
  • Chariots with scythes mounted on the sides to cut down enemy troops.
  • A giant crossbow intended to fire large explosive projectiles several hundred yards.
  • Trebuchets - Very large catapults, based on releasing mechanical counterweights, for flinging heavy projectiles into enemy fortifications.
  • Bombards - Short barrelled, large-calibre, muzzle-loading, heavy siege cannon or mortars, fired by gunpowder and used for throwing heavy stone balls. The modern replacement for the trebuchet. Leonardo's design had adjustable elevation. He also envisaged exploding cannonballs, made up from several smaller stone cannonballs sewn into spherical leather sacks and designed to injure and kill many enemies at one time. We would now call these cluster bombs.
  • Springalds - Smaller, more versatile cannon, for throwing stones or Greek fire, with variable azimuth and elevation adjustment so that they could be aimed more precisely.
  • A series of guns and cannons with multiple barrels. The forerunners of machine guns.
  • They included a triple barrelled cannon and an eight barrelled gun with eight muskets mounted side by side as well as a 33 barrelled version with three banks of eleven muskets designed to enable one set of eleven guns to be fired while a second set cooled off and a third set was being reloaded. The banks were arranged in the form of a triangle with a shaft passing through the middle so that the banks could be rotated to bring the loaded set to the top where it could be fired again.
  • A four wheeled armoured tank with a heavy protective cover reinforced with metal plates similar to a turtle or tortoise shell with 36 large fixed cannons protruding from underneath. Inside a crew of eight men operating cranks geared to the wheels would drive the tank into battle. The drawing in Leonardo's notebook contains a curious flaw since the gearing would cause the front wheels to move in the opposite direction from the rear wheels. If the tank was built as drawn, it would have been unable to move. It is possible that this simple error would have escaped Leonardo's inventive mind but it is also suggested that like his coded notes, it was a deliberate fault introduced to confuse potential plagiarists. The idea that this armoured tank loaded with 36 heavy cannons in such a confined space could be both operated and manoeuvred by eight men is questionable.
  • Automatic igniting device for firearms.
  • Marine Warfare Machines and Devices
  • Leonardo also designed machines for naval warfare including:
    • Designs for a peddle driven paddle boat. The forerunner of the modern pedalo.
    • Hand flippers and floats for walking on water.
    • Diving suit to enable enemy vessels to be attacked from beneath the water's surface by divers cutting holes below the boat's water line. It consisted of a leather diving suit equipped with a bag-like helmet fitting over the diver's head. Air was supplied to the diver by means of two cane tubes attached to the headgear which led up to a cork diving bell floating on the surface.
    • A double hulled ship which could survive the exterior skin being pierced by ramming or underwater attack, a safety feature which was eventually adopted in the nineteenth century.
    • An armoured battleship similar to the armoured tank which could ram and sink enemy ships.
    • Barrage cannon - a large floating circular platform with 16 canons mounted around its periphery. It was powered and steered by two operators turning drive wheels geared to a large central drive wheel connected to paddles for propelling it through the water. Others operators fired the cannons.
  • Flying Machines
  • Leonardo studied the flight of birds and after the legendary Icarus was one of the first to attempt to design human powered flying machines, recording his ideas in numerous drawings. A step up from Chinese kites.
    His drawings included:
    • A design for a parachute. The world's first.
    • Various gliders
    • Designs for wings intended to carry a man aloft, similar to scaled up bat wings.
    • Human powered flying machines known as ornithopters, (from Greek ornithos "bird" and pteron "wing"), based on flapping wings operated by means of levers and cables.
    • A helical air screw with its central shaft powered by a circular human treadmill intended to lift off and fly like a modern helicopter

     

    formulas and shaping bulk weapons  :  Faraday discovers the concept of dielectric constant, invents the variable capacitor and states the law for calculating the capacitance. The capacitance of a parallel plate capacitor is given by:

                                                      C = ε.A/d            F = M.a

    Where:
    C is the capacitance.
    A is the area of the two plates.
    ε is the permittivity (sometimes called the dielectric constant) of the material between the plates.
    d is the separation between the plates

    good low speeds needs control of the direction of the rocket exhaust or the use of ancillary thrusters.

     

              review_dune_poster

     

    There’s a curious case of revisionism surrounding the history of the future making the rounds in fandom. Certain groups, most notably of the depressed juvenile canine persuasion, but hardly limited to them, are making waves about what they claim is a recent phenomenon among the ranks of science fiction authors, their editors, and their publishers to inject distracting, even oppressive amounts of social and political commentary into the novels and short stories they choose to produce.
    These earnestly concerned aficionados of the genre pine for the Golden Age when science fiction was awash in rayguns and replicants, alien ass-kicking, monoliths and megastructures, before this new wave of social justice bards inserted themselves into the conversation and ruined their good fun.
    There’s just one small, niggling problem with this assessment; Sci-fi has always, even primarily, been political. It was just never questioning their politics before. It was never challenging their preconceptions, or calling out their cultural biases. As they say, you never forget your first time.
    Instead of embracing the call to turn their attentions inward for a little self-reflection, many among the community of sci-fi fandom instead looked backwards to an age when all the voices sounded suspiciously like their own. But in the process, they’ve conveniently forgotten the point of the seminal work of some of the genre’s most influential authors.
    Frank Herbert’s masterpiece Dune, as an opening example, dives deep into questions of colonialism, treatment of indigenous people, the roles and relationship between religion and government, all wrapped within a powerful allegory for the rising power of the Islamic petrostates in the middle east and the clash of cultures over scarce resources. To say that Dune wasn’t political is simply absurd.
    Between 1984 and Animal Farm, George Orwell wrote two of the most memorable novels lampooning government control and overreach from both sides of the political spectrum. Philip K. Dick dealt with fascism and slavery in The Man in the High Castle, as did Aldous Huxley’s Brave New World. Orson Scott Card wrote one of the most persuasive and beautiful arguments found in literature in favor of religious tolerance, diversity, inclusiveness, and against heteronormativity in his celebrated Speaker for the Dead, not that he meant to, it just sort of happened. Robert Heinlein spent an entire career writing political allegories about war, government, and what it means to be a citizen, evolving from one end of the political spectrum to the other and back again in a decades-long conversation with himself.
    Jumping media, there are no end of examples of beloved sci-fi movies and television tackling themes of racism, sexism, and unequal treatment of ‘the other,’ Star Trek and Dr. Who chief among them in all their various incarnations.
    The only critical difference is today, the people telling these stories aren’t imagining them. They’re writing from their own lived experiences of inequality and discrimination, persecution and violence. As a result, their stories bring the kind of raw-nerve sharpness that comes with authenticity. New wave authors like Ann Leckie, Charlie Jane Anders, and Liu Cixin make a certain type of reader uncomfortable, because the underlying truth of what they’re writing is so much closer to the surface on an emotional level, and therefore harder to ignore.
    Sci-Fi is currently bookended by two remarkable women. From its very first work in Mary Shelley’s Frankenstein: The Modern Prometheus, straight through to last year’s Hugo winner, N.K. Jemisin’s Obelisk Gate, Sci-Fi has returned to one question more often than any other; “What makes us human?” Shelley asked who qualifies. Almost two-hundred years later, Jemisin argues no one is qualified to answer. The conversation will continue for centuries more, and new voices will be invited to join, from ever more diverse backgrounds, adding their own color and patterns to the tapestry generations of storytellers have woven.
    Eventually, even authors of Artificial Intelligence, the ultimate children of sci-fi, may have to fight for a seat at the table to tell their stories. I’d like to think that, if I’m still breathing, I won’t have grown so ossified that I’m shaking an auto-walker in their direction, complaining about how they’re ruining sci-fi for ‘organic’ humans.

                                              XXX  .  II  Materials science 


    The basic function of computers and communications systems is to process and transmit information in the form of signals representing data, speech, sound, documents, and visual images. These signals are created, transmitted, and processed as moving electrons or photons, and so the basic materials groups involved are classified as electronic and photonic. In some cases, materials known as optoelectronic bridge these two classes, combining abilities to interact usefully with both electrons and photons. Among the electronic materials are various crystalline semiconductors; metalized film conductors; dielectric films; solders; ceramics and polymers formed into substrates on which circuits are assembled or printed .

    The global effort to improve the efficiency of ground transportation vehicles, such as automobiles, buses, trucks, and trains, and thereby reduce the massive amounts of pollutants they emit, provides an excellent context within which to illustrate how materials science functions to develop new or better materials in response to critical human needs. For the automobile industry in particular, the story is a fascinating one in which the desire for lower vehicle weight, reduced emissions, and improved fuel economy has led to intense competition among aluminum, plastics, and steel companies for shares in the enormous markets involved  

    Materials science, the study of the properties of solid materials and how those properties are determined by a material’s composition and structure. It grew out of an amalgam of solid-state physics, metallurgy, and chemistry, since the rich variety of materials properties cannot be understood within the context of any single classical discipline. With a basic understanding of the origins of properties, materials can be selected or designed for an enormous variety of applications, ranging from structural steels to computer microchips. Materials science is therefore important to engineering activities such as electronics, aerospace, telecommunications, information processing, nuclear power, and energy conversion. 

    Figure 1 shows minimal pitch line/space grids and contact-hole arrays patterned with EUVL at global R&D hub IMEC in Belgium, as presented at the recent 2017 IMEC Technology Forum. While there is no way with photolithography to escape the trade-offs of the Resolution/Line-Width-Roughness/Sensitivity (RLS) triangle, patterning at the leading edge of possible pitches requires application-specific etch integration. The bottom row of SEMs in this figure all show dramatic improvements in LWR through atomic-scale etch and deposition treatments to patterned sidewalls.
    Fig.1: SEM plan-view images of minimum pitch Resolution and Line-Width-Roughness and Sensitivity (RLS) for both Chemically-Amplified Resist (CAR) and Non-Chemically-Amplified Resist (NCAR, meaning metal-oxide solution from Inpria) formulations, showing that excessive LWR can be smoothed by various post-lithography deposition/etch treatments. (Source: IMEC)

    Figure 3 lists the major issues in pattern-transfer using plasma etch tools, along with the process variables that must be controlled to ensure proper pattern fidelity. Applied Materials’ Sym3 etch chamber features hardware that provides pulsed energy at dual frequencies along with low residence time of reactant byproducts to allow for precise tuning of process parameters no matter what chemistry is needed.
    Figure 1 shows that ASML plans to introduce such a system after the year 2020, with a throughput of 185 wafers-per-hour (wph) and with overlay of <2 nm. Hans Meiling, ASML vice president of product management EUV, in an exclusive interview with Solid State Technology explained why >0.5 NA capability will not be upgradable on 0.33 NA tools, “the >0.5NA optical path is larger and will require a new platform. The anamorphic imaging will also require stage architectural changes.”
    Fig.1: EUVL stepper product plans for wafers per hour (WPH) and overlay accuracy include change from 0.33 NA to a new >0.5 NA platform. (Source: ASML)
    Overlay of <2 nm will be critical when patterning 8nm half-pitch features, particularly when stitching lines together between half-fields patterned by single-exposures of EUV. Minimal overlay is also needed for EUV to be used to cut grid lines that are initially formed by pitch-splitting ArFi. In addition to the high NA set of mirrors, engineers will have to improve many parts of the stepper to be able to improve on the 3 nm overlay capability promised for the NXE:3400B 0.33 NA tool ASML plans to ship next year.
    “Achieving better overlay requires improvements in wafer and reticle stages regardless of NA,” explained Meiling. “The optics are one of the many components that contribute to overlay. Compare to ArF immersion lithography, where the optics NA has been at 1.35 for several generations but platform improvements have provided significant overlay improvements.”

    Manufacturing Capability Plans
    Figure 4 shows that anamorphic systems require anamorphic masks, so moving from 0.33 to >0.5 NA requires re-designed masks. For relatively large chips, two adjacent exposures with two different anamorphic masks will be needed to pattern the same field area which could be imaged with lower resolution by a single 0.33 NA exposure. Obviously, such adjacent exposures of one layer must be properly “stitched” together by design, which is another constraint on electronic design automation (EDA) software.
    Fig.4: Anamorphic >0.5 NA EUVL system planned by ASML and Zeiss will magnify mask images by 4x in the x-direction and 8x in the y-direction. (Source: Carl Zeiss SMT)
    Though large chips will require twice as many half-field masks, use of anamorphic imaging somewhat reduces the challenges of mask-making. Meiling reminds us that, “With the anamorphic imaging, the 8X direction conditions will actually relax, while the 4X direction will require incremental improvements such as have always been required node-on-node.”
    ASML and Zeiss report that ideal holes which “obscure” the centers of mirrors can surprisingly allow for increased transmission of EUV by each mirror, up to twice that of the “unobscured” mirrors in the 0.33 NA tool. The holes allow the mirrors to reflect through each-other, so they all line up and reflect better. Theoretically then each >0.5 NA half-field can be exposed twice as fast as a 0.33 NA full-field, though it seems that some system throughput loss will be inevitable. Twice the number of steps across the wafer will have to slow down throughput by some percent.
    White two stitched side-by-side >0.5 NA EUVL exposures will be challenging, the generally known alternatives seem likely to provide only lower throughputs and lower yields:
    *   Double-exposure of full-field using 0.33 NA EUVL,
    *   Octuple-exposure of full-field using ArFi, or
    *   Quadruple-exposure of full-field using ArFi complemented by e-beam direct-writing (EbDW) or by directed self-assembly (DSA).



    Figure 1 shows that costs are reduced and edge placement accuracy is improved by eliminating or reducing errors associated with photomasks, litho steps, and hard masks. With highly localized process control, etch depths can vary to accommodate advanced 3D device structures.
    Fig.1: Comparison of (LEFT) the many steps needed to etch ICs using conventional wafer processing and (RIGHT) the two simple steps needed to do direct etching


    Complementary Lithography
    Complementary lithography is a cost-effective variant of multi-patterning where some other patterning technology is used with 193nm ArF immersion (ArFi) to extend the resolution limit of the latter. The company’s Pilot™ CEBL Systems work in coordination with ArFi lithography to pattern cuts (of lines in a “1D lines-and-cuts” layout) and holes (i.e., contacts and vias) with no masks. These CEBL systems can seamlessly incorporate multicolumn EBI to accelerate HVM yield ramps, using feedback and feedforward as well as die-to-database comparison.
    Figure 2 shows that “1D” refers to 1D gridded design rule. In a 1D layout, optical pattern design is restricted to lines running in a single direction, with features perpendicular to the 1D optical design formed in a complementary lithography step known as “cutting”. The complementary step can be performed using a charged particle beam lithography tool such as Multibeam’s array of electrostatically-controlled miniature electron beam columns. Use of electron beam lithography for this complementary process is also called complementary e-beam lithography, or CEBL. The company claims that low pattern-density layers such as for cuts, one multi-column chamber can provide 5 wafers-per-hour (wph) throughput.
    Fig.2: Complementary E-Beam Lithography (CEBL) can be used to “cut” the lines within a 1D grid array previously formed using ArF-immersion (ArFi) optical steppers. (Source: Multibeam)
    Direct deposition can be used to locally interconnect 1D lines produced by optical lithography. This is similar in design principle to complementary lithography, but without using a resist layer during the charged particle beam phase, and without many of the steps required when using a resist layer. In some applications, such as restoring interconnect continuity, the activation electrons are directed to repair defects that are detected during EBI.


    Applied Materials has disclosed commercial availability of new Selectra(TM) selective etch twin-chamber hardware for the company’s high-volume manufacturing (HVM) Producer® platform. Using standard fluorine and chlorine gases already used in traditional Reactive Ion Etch (RIE) chambers, this new tool provides atomic-level precision in the selective removal of materials in 3D devices structures increasingly used for the most advanced silicon ICs. The tool is already in use at three customer fabs for finFET logic HVM, and at two memory fab customers, with a total of >350 chambers planned to have been shipped to many customers by the end of 2016.
    Figure 1 shows a simplified cross-sectional schematic of the Selectra chamber, where the dashed white line indicates some manner of screening functionality so that “Ions are blocked, chemistry passes through” according to the company. In an exclusive interview with Solid State Technology, company representative refused to disclose any hardware details. “We are using typical chemistries that are used in the industry,” explained Ajay Bhatnagar, managing director of Selective Removal Products for Applied Materials. “If there are specific new applications needed than we can use new chemistry. We have a lot of IP on how we filter ions and how we allow radicals to combine on the wafer to create selectivity.”
    FIG 1: Simplified cross-sectional schematic of a silicon wafer being etched by the neutral radicals downstream of the plasma in the Selectra chamber. (Source: Applied Materials)
    From first principles we can assume that the ion filtering is accomplished with some manner of electrically-grounded metal screen. This etch technology accomplishes similar process results to Atomic Layer Etch (ALE) systems sold by Lam, while avoiding the need for specialized self-limiting chemistries and the accompanying chamber throughput reductions associated with pulse-purge process recipes.
    “What we are doing is being able to control the amount of radicals coming to the wafer surface and controlling the removal rates very uniformly across the wafer surface,” asserted Bhatnagar. “If you have this level of atomic control then you don’t need the self-limiting capability. Most of our customers are controlling process with time, so we don’t need to use self-limiting chemistry.” Applied Materials claims that this allows the Selectra tool to have higher relative productivity compared to an ALE tool.
    Due to the intrinsic 2D resolutions limits of optical lithography, leading IC fabs now use multi-patterning (MP) litho flows where sacrificial thin-films must be removed to create the final desired layout. Due to litho limits and CMOS device scaling limits, 2D logic transistors are being replaced by 3D finFETs and eventually Gate-All-Around (GAA) horizontal nanowires (NW). Due to dielectric leakage at the atomic scale, 2D NAND memory is being replaced by 3D-NAND stacks. All of these advanced IC fab processes require the removal of atomic-scale materials with extreme selectivity to remaining materials, so the Selectra chamber is expected to be a future work-horse for the industry.
    When the industry moves to GAA-NW transistors, alternating layers of Si and SiGe will be grown on the wafer surface, 2D patterned into fins, and then the sacrificial SiGe must be selectively etched to form 3D arrays of NW. Figure 2 shows the SiGe etched from alternating Si/SiGe stacks using a Selectra tool, with sharp Si corners after etch indicating excellent selectivity.
    FIG 2: SEM cross-section showing excellent etch of SiGe within alternating Si/SiGe layers, as will be needed for Gate-All-Around (GAA) horizontal NanoWire (NW) transistor formation. (Source: Applied Materials)
    “One of the fundamental differences between this system and old downstream plasma ashers, is that it was designed to provide extreme selectivity to different materials,” said Matt Cogorno, global product manager of Selective Removal Products for Applied Materials. “With this system we can provide silicon to titanium-nitride selectivity at 5000:1, or silicon to silicon-nitride selectivity at 2000:1. This is accomplished with the unique hardware architecture in the chamber combined with how we mix the chemistries. Also, there is no polymer formation in the etch process, so after etching there are no additional processing issues with the need for ashing and/or a wet-etch step to remove polymers.”
    Systems can also be used to provide dry cleaning and surface-preparation due to the extreme selectivity and damage-free material removal.  “You can control the removal rates,” explained Cogorno. “You don’t have ions on the wafer, but you can modulate the number of radicals coming down.” For HVM of ICs with atomic-scale device structures, this new tool can widen process windows and reduce costs compared to both dry RIE and wet etching.

    New materials are being integrated into High Volume Manufacturing (HVM) of semiconductor ICs, while old materials are being extended with more stringent specifications. Defects within materials cause yield losses in HVM fabs, and engineers must identify the specific source of an observed defect before corrective steps can be taken. Honeywell Electronic Materials has been using molecular modeling software provided by Scienomics to both develop new materials and to modify old materials. Modeling allowed Honeywell to uncover the origin of subtle solvation-based film defects within Bottom Anti-Reflective Coatings (BARC) which were degrading yield in a customer’s lithographic process module.
    Scienomics sponsored a Materials Modeling and Simulations online seminar on February 26th of this year, featuring Dr. Nancy Iwamoto of Honeywell discussing how Scienomics software was used to accelerate response to a customer’s manufacturing yield loss. “This was a product running at a customer line,” explained Iwamoto, “and we needed to find the solution.” The product was a Bottom Anti-Reflective Coating (BARC) organo-silicate polymer delivered in solution form and then spun on wafers to a precise thickness.
    Originally observed during optical inspection by fab engineers as 1-2 micron sized vague spots in the BARC, the new defect type was difficult to see yet could be correlated to lithographic yield loss. The defects appeared to be discrete within the film instead of on the top surface, so the source was likely some manner of particle, yet filters did not capture these particles.
    The filter captured some particles rich in silicon, as well as other particles rich in carbon. Sequential filtration showed that particles were passing through impossibly small pores, which suggested that the particles were built of deformable gel-like phases. The challenge was to find the material handling or processing situation, which resulted in thermodynamically possible and kinetically probable conditions that could form such gels.
    Fig: Materials Processes and Simulations (MAPS) gives researchers access to visualization and analysis tools in a single user interface together with access to multiple simulation engines. (Source: Scienomics)
    Molecular modeling and simulation is a powerful technique that can be used for materials design, functional upgrades, process optimization, and manufacturing. The Figure shows a dashboard for Scienomics’ modeling platform. Best practices in molecular modeling to find out-of-control parameters in HVM include a sequential workflow:
    • Build correct models based on experimental observables,
    • Simulate potential molecular structures based on known chemicals and hierarchical models,
    • Analyze manufacturing variabilities to identify excursion sources, and
    • Propose remedy for failure elimination.
    Honeywell Electronic Materials researchers had very few experimental observables from which to start:  phenomenon is rare (yet effects yield), not filterable, yet from thermodynamic hydrolysis parameters it must be quasi-stable. Re-testing of product and re-examination of Outgoing Quality Control (OQC) data at the Honeywell production site showed that the molecular weight of the product was consistent with the desired distribution. There was also an observed BARC thickness increase of ~1nm on the wafer associated with the presence of these defects.
    Using the modeling platform, Honeywell looked at the solubility parameters for different small molecular chains off of known-branched back-bone centers. Gel-like agglomerations could certainly be formed under the wrong conditions. Once the agglomerations form, they are not very stable so they can probably dis-aggregate when being forced through a filter and then re-aggregate on the other side.
    What conditions could induce gel formation? After a few weeks of modeling, it was determined that temperature variations had the greatest influence on the agglomeration, and that variability was strongest at the ~250°K recommended for storage. Storage at 230°K resulted in measurably worse agglomeration, and any extreme in heating/cooling ramp rate tended to reduce solubility.
    Molecular modeling was used in a forensic manner to find that the root cause of gel-like defects was related to thermal history:
    *   Thermodynamics determined the most likely oligomers that could agglomerate,
    *   Temperature-dependent solubility models determined which particles would reach wafers.
    Because of the on-wafer BARC thickness increase of ~1nm, fab engineers could use all of the molecular modeling information to trace the temperature variation to bottles installed in the lithographic track tool. The fab was able to change specifications for the storage and handling of the BARC bottles to bring the process back into control.



    In an exclusive interview with Solid State Technology during SPIE-AL this year, imec Advanced Patterning Department Director Greg McIntyre said, “The big encouraging thing at the conference is the progress on EUV.” The event included a plenary presentation by TSMC Nanopatterning Technology Infrastructure Division Director and SPIE Fellow Anthony Yen on “EUV Lithography: From the Very Beginning to the Eve of Manufacturing.” TSMC is currently learning about EUVL using 10nm- and 7nm-node device test structures, with plans to deploy it for high volume manufacturing (HVM) of contact holes at the 5nm node. Intel researchers confirm that they plan to use EUVL in HVM for the 7nm node.

    Recent improvements in EUV source technology— 80W source power had been shown by the end of 2014, 185W by the end of 2015, and 200W has now been shown by ASML—have been enabled by multiple laser pulses tuned to the best produce plasma from tin droplets. TSMC reports that 518 wafers per day were processed by their ASML EUV stepper, and the tool was available ~70% of the time. TSMC shows that a single EUVL process can create 46nm pitch lines/spaces using a complex 2D mask, as is needed for patterning the metal2 layer within multilevel on-chip interconnects.
    To improve throughput in HVM, the resist sensitivity to the 13.54nm wavelength radiation of EUV needs to be improved, while the line-width roughness (LWR) specification must be held to low single-digit nm. With a 250W source and 25 mJ/cm2 resist sensitivity an EUV stepper should be able to process ~100 wafer-per-hour (wph), which should allow for affordable use when matched with other lithography technologies.
    Researchers from Inpria—the company working on metal-oxide-based EUVL resists—looked at the absorption efficiencies of different resists, and found that the absorption of the metal oxide based resists was ≈ 4 to 5 times higher than that of the Chemically-Amplified Resist (CAR). The Figure shows that higher absorption allows for the use of proportionally thinner resist, which mitigates the issue of line collapse. Resist as thin as 18nm has been patterned over a 70nm thin Spin-On Carbon (SOC) layer without the need for another Bottom Anti-Reflective Coating (BARC). Inpria today can supply 26 mJ/cm2 resist that creates 4.6nm LWR over 140nm Depth of Focus (DoF).
    To prevent pattern collapse, the thickness of resist is reduced proportionally to the minimum half-pitch (HP) of lines/spaces. (Source: JSR Micro)
    JEIDEC researchers presented their summary of the trade-off between sensitivity and LWR for metal-oxide-based EUV resists:  ultra high sensitivity of 7 mJ/cm2 to pattern 17nm lines with 5.6nm LWR, or low sensitivity of 33 mJ/cm2 to pattern 23nm lines with 3.8nm LWR.
    In a keynote presentation, Seong-Sue Kim of Samsung Electronics stated that, “Resist pattern defectivity remains the biggest issue. Metal-oxide resist development needs to be expedited.” The challenge is that defectivity at the nanometer-scale derives from “stochastics,” which means random processes that are not fully predictable.
    Stochastics of Nanopatterning
    Anna Lio, from Intel’s Portland Technology Development group, stated that the challenges of controlling resist stochastics, “could be the deal breaker.” Intel ran a 7-month test of vias made using EUVL, and found that via critical dimensions (CD), edge-placement-error (EPE), and chain resistances all showed good results compared to 193i. However, there are inherent control issues due to the random nature of phenomena involved in resist patterning:  incident “photons”, absorption, freed electrons, acid generation, acid quenching, protection groups, development processes, etc.
    Stochastics for novel chemistries can only be controlled by understanding in detail the sources of variability. From first-principles, EUV resist reactions are not photon-chemistry, but are really radiation-chemistry with many different radiation paths and electrons which can be generated. If every via in an advanced logic IC must work then the failure rate must be on the order of 1 part-per-trillion (ppt), and stochastic variability from non-homogeneous chemistries must be eliminated.
    Consider that for a CAR designed for 15mJ/cm2 sensitivity, there will be just:
    145 photons/nm2 for 193, and
    10 photons/nm2 for EUV.
    To improve sensitivity and suppress failures from photon shot-noise, we need to increase resist absorption, and also re-consider chemical amplification mechanisms. “The requirements will be the same for any resist and any chemistry,” reminded Lio. “We need to evaluate all resists at the same exposure levels and at the same rules, and look at different features to show stochastics like in the tails of distributions. Resolution is important but stochastics will rule our world at the dimensions we’re dealing with.”