Raw Materials Used in the Manufacture of Electronic Components
The stability of the round determines the tooth
The electronic devices used by millions of people daily are made of many tiny electronic components and those components are made from a variety of raw materials. These raw materials have special characteristics, ranging from superior conductivity to unmatched insulating properties, that make them perfect for use in electronic components.
Metals
Copper is often used for its excellent conductivity and malleability (the ability to be shaped and mashed). Nckel, chromium, aluminum, lead, silver and tin are also used. These metals go into components such as resistors, capacitors and transducers.Plastics and Other Petroleum-Based Materials
Plastics and other petroleum-based materials are used in electronic components mostly for their insulating and heat-resistant properties. Polystyrene, polyethylene terephthalate (PET) and polyvinylchlorate (PVC) are widely used in components such as capacitors and thermistors.Minerals and Non-Metallic Materials
Silicon — considered a metalloid, or semimetal — is used in microchips and semiconductors. Other nonmetal or semimetal materials are antimony, bismuth, cobalt, fluorite, garnet, magnesium and talc.Other Raw Materials
Ceramics are used as insulators in a variety of electronic components. Certain clays, glasses, calcium (in various forms), gold and carbon (in various forms are also often used.
XXX . I various kinds of weapons in technology
military inventions included:
- Mobile bridges including drawbridges and a swing bridge for crossing moats, ditches and rivers. His swing bridge was a cantilever design with a pivot on the river bank a counterweight to facilitate manoeuvring the span over the river. It also had wheels and a rope-and-pulley system which enabled easy transport and quick deployment.
- Siege machines for storming walls.
- Chariots with scythes mounted on the sides to cut down enemy troops.
- A giant crossbow intended to fire large explosive projectiles several hundred yards.
- Trebuchets - Very large catapults, based on releasing mechanical counterweights, for flinging heavy projectiles into enemy fortifications.
- Bombards - Short barrelled, large-calibre, muzzle-loading, heavy siege cannon or mortars, fired by gunpowder and used for throwing heavy stone balls. The modern replacement for the trebuchet. Leonardo's design had adjustable elevation. He also envisaged exploding cannonballs, made up from several smaller stone cannonballs sewn into spherical leather sacks and designed to injure and kill many enemies at one time. We would now call these cluster bombs.
- Springalds - Smaller, more versatile cannon, for throwing stones or Greek fire, with variable azimuth and elevation adjustment so that they could be aimed more precisely.
- A series of guns and cannons with multiple barrels. The forerunners of machine guns.
They included a triple barrelled cannon and an eight barrelled gun with eight muskets mounted side by side as well as a 33 barrelled version with three banks of eleven muskets designed to enable one set of eleven guns to be fired while a second set cooled off and a third set was being reloaded. The banks were arranged in the form of a triangle with a shaft passing through the middle so that the banks could be rotated to bring the loaded set to the top where it could be fired again.
- A four wheeled armoured tank with a heavy protective cover reinforced with metal plates similar to a turtle or tortoise shell with 36 large fixed cannons protruding from underneath. Inside a crew of eight men operating cranks geared to the wheels would drive the tank into battle. The drawing in Leonardo's notebook contains a curious flaw since the gearing would cause the front wheels to move in the opposite direction from the rear wheels. If the tank was built as drawn, it would have been unable to move. It is possible that this simple error would have escaped Leonardo's inventive mind but it is also suggested that like his coded notes, it was a deliberate fault introduced to confuse potential plagiarists. The idea that this armoured tank loaded with 36 heavy cannons in such a confined space could be both operated and manoeuvred by eight men is questionable.
- Automatic igniting device for firearms.
Marine Warfare Machines and Devices
Leonardo also designed machines for naval warfare including:
- Designs for a peddle driven paddle boat. The forerunner of the modern pedalo.
- Hand flippers and floats for walking on water.
- Diving suit to enable enemy vessels to be attacked from beneath the water's surface by divers cutting holes below the boat's water line. It consisted of a leather diving suit equipped with a bag-like helmet fitting over the diver's head. Air was supplied to the diver by means of two cane tubes attached to the headgear which led up to a cork diving bell floating on the surface.
- A double hulled ship which could survive the exterior skin being pierced by ramming or underwater attack, a safety feature which was eventually adopted in the nineteenth century.
- An armoured battleship similar to the armoured tank which could ram and sink enemy ships.
- Barrage cannon - a large floating circular platform with 16 canons mounted around its periphery. It was powered and steered by two operators turning drive wheels geared to a large central drive wheel connected to paddles for propelling it through the water. Others operators fired the cannons.
Flying Machines
Leonardo studied the flight of birds and after the legendary Icarus was one of the first to attempt to design human powered flying machines, recording his ideas in numerous drawings. A step up from Chinese kites.
His drawings included:
- A design for a parachute. The world's first.
- Various gliders
- Designs for wings intended to carry a man aloft, similar to scaled up bat wings.
- Human powered flying machines known as ornithopters, (from Greek ornithos "bird" and pteron "wing"), based on flapping wings operated by means of levers and cables.
- A helical air screw with its central shaft powered by a circular human treadmill intended to lift off and fly like a modern helicopter
formulas and shaping bulk weapons : Faraday discovers the concept of dielectric constant, invents the variable capacitor and states the law for calculating the capacitance. The capacitance of a parallel plate capacitor is given by:
C = ε.A/d F = M.a
Where:
C is the capacitance.
A is the area of the two plates.
ε is the permittivity (sometimes called the dielectric constant) of the material between the plates.
d is the separation between the plates
good low speeds needs control of the direction of the rocket exhaust or the use of ancillary thrusters.
There’s a curious case of revisionism surrounding the history of the future making the rounds in fandom. Certain groups, most notably of the depressed juvenile canine persuasion, but hardly limited to them, are making waves about what they claim is a recent phenomenon among the ranks of science fiction authors, their editors, and their publishers to inject distracting, even oppressive amounts of social and political commentary into the novels and short stories they choose to produce.
These earnestly concerned aficionados of the genre pine for the Golden Age when science fiction was awash in rayguns and replicants, alien ass-kicking, monoliths and megastructures, before this new wave of social justice bards inserted themselves into the conversation and ruined their good fun.
There’s just one small, niggling problem with this assessment; Sci-fi has always, even primarily, been political. It was just never questioning their politics before. It was never challenging their preconceptions, or calling out their cultural biases. As they say, you never forget your first time.
Instead of embracing the call to turn their attentions inward for a little self-reflection, many among the community of sci-fi fandom instead looked backwards to an age when all the voices sounded suspiciously like their own. But in the process, they’ve conveniently forgotten the point of the seminal work of some of the genre’s most influential authors.
Frank Herbert’s masterpiece Dune, as an opening example, dives deep into questions of colonialism, treatment of indigenous people, the roles and relationship between religion and government, all wrapped within a powerful allegory for the rising power of the Islamic petrostates in the middle east and the clash of cultures over scarce resources. To say that Dune wasn’t political is simply absurd.
Between 1984 and Animal Farm, George Orwell wrote two of the most memorable novels lampooning government control and overreach from both sides of the political spectrum. Philip K. Dick dealt with fascism and slavery in The Man in the High Castle, as did Aldous Huxley’s Brave New World. Orson Scott Card wrote one of the most persuasive and beautiful arguments found in literature in favor of religious tolerance, diversity, inclusiveness, and against heteronormativity in his celebrated Speaker for the Dead, not that he meant to, it just sort of happened. Robert Heinlein spent an entire career writing political allegories about war, government, and what it means to be a citizen, evolving from one end of the political spectrum to the other and back again in a decades-long conversation with himself.
Jumping media, there are no end of examples of beloved sci-fi movies and television tackling themes of racism, sexism, and unequal treatment of ‘the other,’ Star Trek and Dr. Who chief among them in all their various incarnations.
The only critical difference is today, the people telling these stories aren’t imagining them. They’re writing from their own lived experiences of inequality and discrimination, persecution and violence. As a result, their stories bring the kind of raw-nerve sharpness that comes with authenticity. New wave authors like Ann Leckie, Charlie Jane Anders, and Liu Cixin make a certain type of reader uncomfortable, because the underlying truth of what they’re writing is so much closer to the surface on an emotional level, and therefore harder to ignore.
Sci-Fi is currently bookended by two remarkable women. From its very first work in Mary Shelley’s Frankenstein: The Modern Prometheus, straight through to last year’s Hugo winner, N.K. Jemisin’s Obelisk Gate, Sci-Fi has returned to one question more often than any other; “What makes us human?” Shelley asked who qualifies. Almost two-hundred years later, Jemisin argues no one is qualified to answer. The conversation will continue for centuries more, and new voices will be invited to join, from ever more diverse backgrounds, adding their own color and patterns to the tapestry generations of storytellers have woven.
Eventually, even authors of Artificial Intelligence, the ultimate children of sci-fi, may have to fight for a seat at the table to tell their stories. I’d like to think that, if I’m still breathing, I won’t have grown so ossified that I’m shaking an auto-walker in their direction, complaining about how they’re ruining sci-fi for ‘organic’ humans.
XXX . II Materials science
The basic function of computers and communications systems is to process and transmit information in the form of signals representing data, speech, sound, documents, and visual images. These signals are created, transmitted, and processed as moving electrons or photons, and so the basic materials groups involved are classified as electronic and photonic. In some cases, materials known as optoelectronic bridge these two classes, combining abilities to interact usefully with both electrons and photons. Among the electronic materials are various crystalline semiconductors; metalized film conductors; dielectric films; solders; ceramics and polymers formed into substrates on which circuits are assembled or printed .
The global effort to improve the efficiency of ground transportation vehicles, such as automobiles, buses, trucks, and trains, and thereby reduce the massive amounts of pollutants they emit, provides an excellent context within which to illustrate how materials science functions to develop new or better materials in response to critical human needs. For the automobile industry in particular, the story is a fascinating one in which the desire for lower vehicle weight, reduced emissions, and improved fuel economy has led to intense competition among aluminum, plastics, and steel companies for shares in the enormous markets involved
Materials science, the study of the properties of solid materials and how those properties are determined by a material’s composition and structure. It grew out of an amalgam of solid-state physics, metallurgy, and chemistry, since the rich variety of materials properties cannot be understood within the context of any single classical discipline. With a basic understanding of the origins of properties, materials can be selected or designed for an enormous variety of applications, ranging from structural steels to computer microchips. Materials science is therefore important to engineering activities such as electronics, aerospace, telecommunications, information processing, nuclear power, and energy conversion.
Figure 1 shows minimal pitch line/space grids and contact-hole arrays patterned with EUVL at global R&D hub IMEC in Belgium, as presented at the recent 2017 IMEC Technology Forum. While there is no way with photolithography to escape the trade-offs of the Resolution/Line-Width-Roughness/Sensitivity (RLS) triangle, patterning at the leading edge of possible pitches requires application-specific etch integration. The bottom row of SEMs in this figure all show dramatic improvements in LWR through atomic-scale etch and deposition treatments to patterned sidewalls.
Fig.1: SEM plan-view images of minimum pitch Resolution and Line-Width-Roughness and Sensitivity (RLS) for both Chemically-Amplified Resist (CAR) and Non-Chemically-Amplified Resist (NCAR, meaning metal-oxide solution from Inpria) formulations, showing that excessive LWR can be smoothed by various post-lithography deposition/etch treatments. (Source: IMEC)
Figure 3 lists the major issues in pattern-transfer using plasma etch tools, along with the process variables that must be controlled to ensure proper pattern fidelity. Applied Materials’ Sym3 etch chamber features hardware that provides pulsed energy at dual frequencies along with low residence time of reactant byproducts to allow for precise tuning of process parameters no matter what chemistry is needed.
Figure 1 shows that ASML plans to introduce such a system after the year 2020, with a throughput of 185 wafers-per-hour (wph) and with overlay of <2 nm. Hans Meiling, ASML vice president of product management EUV, in an exclusive interview with Solid State Technology explained why >0.5 NA capability will not be upgradable on 0.33 NA tools, “the >0.5NA optical path is larger and will require a new platform. The anamorphic imaging will also require stage architectural changes.”
Fig.1: EUVL stepper product plans for wafers per hour (WPH) and overlay accuracy include change from 0.33 NA to a new >0.5 NA platform. (Source: ASML)
Overlay of <2 nm will be critical when patterning 8nm half-pitch features, particularly when stitching lines together between half-fields patterned by single-exposures of EUV. Minimal overlay is also needed for EUV to be used to cut grid lines that are initially formed by pitch-splitting ArFi. In addition to the high NA set of mirrors, engineers will have to improve many parts of the stepper to be able to improve on the 3 nm overlay capability promised for the NXE:3400B 0.33 NA tool ASML plans to ship next year.
“Achieving better overlay requires improvements in wafer and reticle stages regardless of NA,” explained Meiling. “The optics are one of the many components that contribute to overlay. Compare to ArF immersion lithography, where the optics NA has been at 1.35 for several generations but platform improvements have provided significant overlay improvements.”
Fig.1: EUVL stepper product plans for wafers per hour (WPH) and overlay accuracy include change from 0.33 NA to a new >0.5 NA platform. (Source: ASML)
Manufacturing Capability Plans
Figure 4 shows that anamorphic systems require anamorphic masks, so moving from 0.33 to >0.5 NA requires re-designed masks. For relatively large chips, two adjacent exposures with two different anamorphic masks will be needed to pattern the same field area which could be imaged with lower resolution by a single 0.33 NA exposure. Obviously, such adjacent exposures of one layer must be properly “stitched” together by design, which is another constraint on electronic design automation (EDA) software.
Fig.4: Anamorphic >0.5 NA EUVL system planned by ASML and Zeiss will magnify mask images by 4x in the x-direction and 8x in the y-direction. (Source: Carl Zeiss SMT)
Though large chips will require twice as many half-field masks, use of anamorphic imaging somewhat reduces the challenges of mask-making. Meiling reminds us that, “With the anamorphic imaging, the 8X direction conditions will actually relax, while the 4X direction will require incremental improvements such as have always been required node-on-node.”
ASML and Zeiss report that ideal holes which “obscure” the centers of mirrors can surprisingly allow for increased transmission of EUV by each mirror, up to twice that of the “unobscured” mirrors in the 0.33 NA tool. The holes allow the mirrors to reflect through each-other, so they all line up and reflect better. Theoretically then each >0.5 NA half-field can be exposed twice as fast as a 0.33 NA full-field, though it seems that some system throughput loss will be inevitable. Twice the number of steps across the wafer will have to slow down throughput by some percent.
White two stitched side-by-side >0.5 NA EUVL exposures will be challenging, the generally known alternatives seem likely to provide only lower throughputs and lower yields:
* Double-exposure of full-field using 0.33 NA EUVL,
* Octuple-exposure of full-field using ArFi, or
* Quadruple-exposure of full-field using ArFi complemented by e-beam direct-writing (EbDW) or by directed self-assembly (DSA).
Fig.4: Anamorphic >0.5 NA EUVL system planned by ASML and Zeiss will magnify mask images by 4x in the x-direction and 8x in the y-direction. (Source: Carl Zeiss SMT)
Figure 1 shows that costs are reduced and edge placement accuracy is improved by eliminating or reducing errors associated with photomasks, litho steps, and hard masks. With highly localized process control, etch depths can vary to accommodate advanced 3D device structures.
Fig.1: Comparison of (LEFT) the many steps needed to etch ICs using conventional wafer processing and (RIGHT) the two simple steps needed to do direct etching
Complementary Lithography
Complementary lithography is a cost-effective variant of multi-patterning where some other patterning technology is used with 193nm ArF immersion (ArFi) to extend the resolution limit of the latter. The company’s Pilot™ CEBL Systems work in coordination with ArFi lithography to pattern cuts (of lines in a “1D lines-and-cuts” layout) and holes (i.e., contacts and vias) with no masks. These CEBL systems can seamlessly incorporate multicolumn EBI to accelerate HVM yield ramps, using feedback and feedforward as well as die-to-database comparison.
Figure 2 shows that “1D” refers to 1D gridded design rule. In a 1D layout, optical pattern design is restricted to lines running in a single direction, with features perpendicular to the 1D optical design formed in a complementary lithography step known as “cutting”. The complementary step can be performed using a charged particle beam lithography tool such as Multibeam’s array of electrostatically-controlled miniature electron beam columns. Use of electron beam lithography for this complementary process is also called complementary e-beam lithography, or CEBL. The company claims that low pattern-density layers such as for cuts, one multi-column chamber can provide 5 wafers-per-hour (wph) throughput.
Fig.2: Complementary E-Beam Lithography (CEBL) can be used to “cut” the lines within a 1D grid array previously formed using ArF-immersion (ArFi) optical steppers. (Source: Multibeam)
Applied Materials has disclosed commercial availability of new Selectra(TM) selective etch twin-chamber hardware for the company’s high-volume manufacturing (HVM) Producer® platform. Using standard fluorine and chlorine gases already used in traditional Reactive Ion Etch (RIE) chambers, this new tool provides atomic-level precision in the selective removal of materials in 3D devices structures increasingly used for the most advanced silicon ICs. The tool is already in use at three customer fabs for finFET logic HVM, and at two memory fab customers, with a total of >350 chambers planned to have been shipped to many customers by the end of 2016.
Figure 1 shows a simplified cross-sectional schematic of the Selectra chamber, where the dashed white line indicates some manner of screening functionality so that “Ions are blocked, chemistry passes through” according to the company. In an exclusive interview with Solid State Technology, company representative refused to disclose any hardware details. “We are using typical chemistries that are used in the industry,” explained Ajay Bhatnagar, managing director of Selective Removal Products for Applied Materials. “If there are specific new applications needed than we can use new chemistry. We have a lot of IP on how we filter ions and how we allow radicals to combine on the wafer to create selectivity.”
FIG 1: Simplified cross-sectional schematic of a silicon wafer being etched by the neutral radicals downstream of the plasma in the Selectra chamber. (Source: Applied Materials)
“What we are doing is being able to control the amount of radicals coming to the wafer surface and controlling the removal rates very uniformly across the wafer surface,” asserted Bhatnagar. “If you have this level of atomic control then you don’t need the self-limiting capability. Most of our customers are controlling process with time, so we don’t need to use self-limiting chemistry.” Applied Materials claims that this allows the Selectra tool to have higher relative productivity compared to an ALE tool.
Due to the intrinsic 2D resolutions limits of optical lithography, leading IC fabs now use multi-patterning (MP) litho flows where sacrificial thin-films must be removed to create the final desired layout. Due to litho limits and CMOS device scaling limits, 2D logic transistors are being replaced by 3D finFETs and eventually Gate-All-Around (GAA) horizontal nanowires (NW). Due to dielectric leakage at the atomic scale, 2D NAND memory is being replaced by 3D-NAND stacks. All of these advanced IC fab processes require the removal of atomic-scale materials with extreme selectivity to remaining materials, so the Selectra chamber is expected to be a future work-horse for the industry.
When the industry moves to GAA-NW transistors, alternating layers of Si and SiGe will be grown on the wafer surface, 2D patterned into fins, and then the sacrificial SiGe must be selectively etched to form 3D arrays of NW. Figure 2 shows the SiGe etched from alternating Si/SiGe stacks using a Selectra tool, with sharp Si corners after etch indicating excellent selectivity.
FIG 2: SEM cross-section showing excellent etch of SiGe within alternating Si/SiGe layers, as will be needed for Gate-All-Around (GAA) horizontal NanoWire (NW) transistor formation. (Source: Applied Materials)
Systems can also be used to provide dry cleaning and surface-preparation due to the extreme selectivity and damage-free material removal. “You can control the removal rates,” explained Cogorno. “You don’t have ions on the wafer, but you can modulate the number of radicals coming down.” For HVM of ICs with atomic-scale device structures, this new tool can widen process windows and reduce costs compared to both dry RIE and wet etching.
New materials are being integrated into High Volume Manufacturing (HVM) of semiconductor ICs, while old materials are being extended with more stringent specifications. Defects within materials cause yield losses in HVM fabs, and engineers must identify the specific source of an observed defect before corrective steps can be taken. Honeywell Electronic Materials has been using molecular modeling software provided by Scienomics to both develop new materials and to modify old materials. Modeling allowed Honeywell to uncover the origin of subtle solvation-based film defects within Bottom Anti-Reflective Coatings (BARC) which were degrading yield in a customer’s lithographic process module.
Scienomics sponsored a Materials Modeling and Simulations online seminar on February 26th of this year, featuring Dr. Nancy Iwamoto of Honeywell discussing how Scienomics software was used to accelerate response to a customer’s manufacturing yield loss. “This was a product running at a customer line,” explained Iwamoto, “and we needed to find the solution.” The product was a Bottom Anti-Reflective Coating (BARC) organo-silicate polymer delivered in solution form and then spun on wafers to a precise thickness.
Originally observed during optical inspection by fab engineers as 1-2 micron sized vague spots in the BARC, the new defect type was difficult to see yet could be correlated to lithographic yield loss. The defects appeared to be discrete within the film instead of on the top surface, so the source was likely some manner of particle, yet filters did not capture these particles.
The filter captured some particles rich in silicon, as well as other particles rich in carbon. Sequential filtration showed that particles were passing through impossibly small pores, which suggested that the particles were built of deformable gel-like phases. The challenge was to find the material handling or processing situation, which resulted in thermodynamically possible and kinetically probable conditions that could form such gels.
Fig: Materials Processes and Simulations (MAPS) gives researchers access to visualization and analysis tools in a single user interface together with access to multiple simulation engines. (Source: Scienomics)
- Build correct models based on experimental observables,
- Simulate potential molecular structures based on known chemicals and hierarchical models,
- Analyze manufacturing variabilities to identify excursion sources, and
- Propose remedy for failure elimination.
Using the modeling platform, Honeywell looked at the solubility parameters for different small molecular chains off of known-branched back-bone centers. Gel-like agglomerations could certainly be formed under the wrong conditions. Once the agglomerations form, they are not very stable so they can probably dis-aggregate when being forced through a filter and then re-aggregate on the other side.
What conditions could induce gel formation? After a few weeks of modeling, it was determined that temperature variations had the greatest influence on the agglomeration, and that variability was strongest at the ~250°K recommended for storage. Storage at 230°K resulted in measurably worse agglomeration, and any extreme in heating/cooling ramp rate tended to reduce solubility.
Molecular modeling was used in a forensic manner to find that the root cause of gel-like defects was related to thermal history:
* Thermodynamics determined the most likely oligomers that could agglomerate,
* Temperature-dependent solubility models determined which particles would reach wafers.
Because of the on-wafer BARC thickness increase of ~1nm, fab engineers could use all of the molecular modeling information to trace the temperature variation to bottles installed in the lithographic track tool. The fab was able to change specifications for the storage and handling of the BARC bottles to bring the process back into control.
In an exclusive interview with Solid State Technology during SPIE-AL this year, imec Advanced Patterning Department Director Greg McIntyre said, “The big encouraging thing at the conference is the progress on EUV.” The event included a plenary presentation by TSMC Nanopatterning Technology Infrastructure Division Director and SPIE Fellow Anthony Yen on “EUV Lithography: From the Very Beginning to the Eve of Manufacturing.” TSMC is currently learning about EUVL using 10nm- and 7nm-node device test structures, with plans to deploy it for high volume manufacturing (HVM) of contact holes at the 5nm node. Intel researchers confirm that they plan to use EUVL in HVM for the 7nm node.
Recent improvements in EUV source technology— 80W source power had been shown by the end of 2014, 185W by the end of 2015, and 200W has now been shown by ASML—have been enabled by multiple laser pulses tuned to the best produce plasma from tin droplets. TSMC reports that 518 wafers per day were processed by their ASML EUV stepper, and the tool was available ~70% of the time. TSMC shows that a single EUVL process can create 46nm pitch lines/spaces using a complex 2D mask, as is needed for patterning the metal2 layer within multilevel on-chip interconnects.
To improve throughput in HVM, the resist sensitivity to the 13.54nm wavelength radiation of EUV needs to be improved, while the line-width roughness (LWR) specification must be held to low single-digit nm. With a 250W source and 25 mJ/cm2 resist sensitivity an EUV stepper should be able to process ~100 wafer-per-hour (wph), which should allow for affordable use when matched with other lithography technologies.
Researchers from Inpria—the company working on metal-oxide-based EUVL resists—looked at the absorption efficiencies of different resists, and found that the absorption of the metal oxide based resists was ≈ 4 to 5 times higher than that of the Chemically-Amplified Resist (CAR). The Figure shows that higher absorption allows for the use of proportionally thinner resist, which mitigates the issue of line collapse. Resist as thin as 18nm has been patterned over a 70nm thin Spin-On Carbon (SOC) layer without the need for another Bottom Anti-Reflective Coating (BARC). Inpria today can supply 26 mJ/cm2 resist that creates 4.6nm LWR over 140nm Depth of Focus (DoF).
To prevent pattern collapse, the thickness of resist is reduced proportionally to the minimum half-pitch (HP) of lines/spaces. (Source: JSR Micro)
In a keynote presentation, Seong-Sue Kim of Samsung Electronics stated that, “Resist pattern defectivity remains the biggest issue. Metal-oxide resist development needs to be expedited.” The challenge is that defectivity at the nanometer-scale derives from “stochastics,” which means random processes that are not fully predictable.
Stochastics of Nanopatterning
Anna Lio, from Intel’s Portland Technology Development group, stated that the challenges of controlling resist stochastics, “could be the deal breaker.” Intel ran a 7-month test of vias made using EUVL, and found that via critical dimensions (CD), edge-placement-error (EPE), and chain resistances all showed good results compared to 193i. However, there are inherent control issues due to the random nature of phenomena involved in resist patterning: incident “photons”, absorption, freed electrons, acid generation, acid quenching, protection groups, development processes, etc.
Stochastics for novel chemistries can only be controlled by understanding in detail the sources of variability. From first-principles, EUV resist reactions are not photon-chemistry, but are really radiation-chemistry with many different radiation paths and electrons which can be generated. If every via in an advanced logic IC must work then the failure rate must be on the order of 1 part-per-trillion (ppt), and stochastic variability from non-homogeneous chemistries must be eliminated.
Consider that for a CAR designed for 15mJ/cm2 sensitivity, there will be just:
145 photons/nm2 for 193, and
10 photons/nm2 for EUV.
To improve sensitivity and suppress failures from photon shot-noise, we need to increase resist absorption, and also re-consider chemical amplification mechanisms. “The requirements will be the same for any resist and any chemistry,” reminded Lio. “We need to evaluate all resists at the same exposure levels and at the same rules, and look at different features to show stochastics like in the tails of distributions. Resolution is important but stochastics will rule our world at the dimensions we’re dealing with.”
Tidak ada komentar:
Posting Komentar